Morning Overview on MSN

MIT’s chip stacking leap could slash energy use for hungry AI chips

Artificial intelligence is colliding with a hard physical limit: the energy it takes to move data on and off chips. Training ...
Hosted on MSN

A roadmap for next-generation 2D semiconductor 'gate stack' technology

Seoul National University's College of Engineering announced that a research team led by Professor Chul-Ho Lee from the Department of Electrical and Computer Engineering has outlined a comprehensive ...
PC Gamer

Electronics researchers have developed a new way to stack transistors in a die, to keep Moore's law alive for as long as possible

It's the semiconductor version of one potato, two potato. When you purchase through links on our site, we may earn an affiliate commission. Here’s how it works. For 60 years, Gordon Moore's ...
Ars Technica

Making a 3D stack of transistors made from 2D materials

Main game is to stick as many floating-point (or more recently reduced integer) arithmetic units as you can to increase the number of math operations you can do in parallel. LLMs are just giant ...
Electronic Design

Intel Proposes New Path for Moore's Law With 3D Stacked Transistors

Intel CEO Pat Gelsinger has announced plans to recover the company's chip-making crown by 2025. But the company has shared more details about research that could help it compete even further in the ...
Electronic Design

Key trends driving the need for more semiconductor system-level testing

Decades of advances in the semiconductor industry continue to drive an insatiable consumer demand for smaller, more powerful, more ubiquitous semiconductor devices—whether in our cars, within our ...
EurekAlert!

SNU researchers outline a roadmap for next-generation 2D semiconductor 'gate stack' technology

Seoul National University’s College of Engineering announced that a research team led by Professor Chul-Ho Lee from the Department of Electrical and Computer Engineering has outlined a comprehensive ...